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Chip CenterDSDDesign Environment

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  In this section, the elements related to design environment within DSD are covered and described as follows:

(1) Design Flow

  Based on vendors' EDA tools, CIC furnishes six choices of design flows to academic/educational institutes and industries in Taiwan. Six popliar design flows are as follows:
  • Cell-Based design flow

  • DFT design flow

  • Flil-Custom design flow

  • Mixed-Signal design flow

  • RF-MMIC design flow

  • FPGA design flow
(2) EDA Tools Support

  In CIC, all industry-standard and advanced EDA tools are technology-transferred to academic/educational institutes in Taiwan under the contracts with EDA vendors. For the time being, since the SoC methodology and nanometer process plays important roles of future IC design development, several innovative EDA tools were introduced in the late 2002 as follows:

  • Verplex-Logic Equivalence Checker for formal verification

  • Dolphin-SMASH for circuit simliation

  • Synopsys-CoCentric System Studio for system-level design

  • Agilent-ADS Designer for RF and system-level design

  • Mentor Graphics-Seamless CVE for HW/SW co-verification

  • TransEDA-Verification Navigator for code coverage analysis
  So as to acquire conceptual functions of these aforementioned EDA tools, we list EDA tools purchased by CIC as shown in Table I.



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